# HG changeset patch
# User Chris Peterson <cpeterson@mozilla.com>
# Date 1548888121 0
#      Wed Jan 30 22:42:01 2019 +0000
# Node ID 7e275859021304429a08ed48ec3700b10f4283df
# Parent  51946259952e96d4a55d6dfad474a9cf36c65e9c
Bug 1481097 - vixl: Remove vixl assembler workaround for gcc 4.8.2 bug. r=sstangl

This gcc 4.8.2 workaround (from bug 1219050) is no longer needed because Firefox currently requires gcc 6.1 or later (as of bug 1444274).

Differential Revision: https://phabricator.services.mozilla.com/D5506

diff --git a/js/src/jit/arm64/vixl/Assembler-vixl.h b/js/src/jit/arm64/vixl/Assembler-vixl.h
--- a/js/src/jit/arm64/vixl/Assembler-vixl.h
+++ b/js/src/jit/arm64/vixl/Assembler-vixl.h
@@ -4015,21 +4015,19 @@ class Assembler : public MozBaseAssemble
   void LoadStoreStructVerify(const VRegister& vt,
                              const MemOperand& addr,
                              Instr op);
 
   void Prefetch(PrefetchOperation op,
                 const MemOperand& addr,
                 LoadStoreScalingOption option = PreferScaledOffset);
 
-  // TODO(all): The third parameter should be passed by reference but gcc 4.8.2
-  // reports a bogus uninitialised warning then.
   BufferOffset Logical(const Register& rd,
                        const Register& rn,
-                       const Operand operand,
+                       const Operand& operand,
                        LogicalOp op);
   BufferOffset LogicalImmediate(const Register& rd,
                                 const Register& rn,
                                 unsigned n,
                                 unsigned imm_s,
                                 unsigned imm_r,
                                 LogicalOp op);
 
diff --git a/js/src/jit/arm64/vixl/MozAssembler-vixl.cpp b/js/src/jit/arm64/vixl/MozAssembler-vixl.cpp
--- a/js/src/jit/arm64/vixl/MozAssembler-vixl.cpp
+++ b/js/src/jit/arm64/vixl/MozAssembler-vixl.cpp
@@ -395,17 +395,17 @@ void Assembler::svc(Instruction* at, int
 
 
 void Assembler::nop(Instruction* at) {
   hint(at, NOP);
 }
 
 
 BufferOffset Assembler::Logical(const Register& rd, const Register& rn,
-                                const Operand operand, LogicalOp op)
+                                const Operand& operand, LogicalOp op)
 {
   VIXL_ASSERT(rd.size() == rn.size());
   if (operand.IsImmediate()) {
     int64_t immediate = operand.immediate();
     unsigned reg_size = rd.size();
 
     VIXL_ASSERT(immediate != 0);
     VIXL_ASSERT(immediate != -1);
@@ -704,9 +704,8 @@ void MozBaseAssembler::RetargetNearBranc
 
 
 void MozBaseAssembler::RetargetFarBranch(Instruction* i, uint8_t** slot, uint8_t* dest, Condition cond) {
   MOZ_CRASH("RetargetFarBranch()");
 }
 
 
 }  // namespace vixl
-